1. Field of the Invention
This invention relates to a liquid crystal display and more particularly to a driving method and apparatus for a liquid crystal display wherein a different level of common voltages can be selectively supplied on a basis of black brightness data or white brightness data applied to a liquid crystal display panel.
2. Discussion of the Related Art
A liquid crystal display (LCD) controls light transmittance of liquid crystal cells in accordance with video signals to thereby display a picture. An active matrix liquid crystal display device includes a switching device provided for each liquid crystal cell to allow displaying moving pictures by active control of the switching device. Typically, a thin film transistor (TFT) is employed as the switching device in active matrix liquid crystal display devices as shown in FIG. 1.
Referring to FIG. 1, the active matrix LCD converts supplied digital input data into an analog data voltage using a gamma reference voltage, and supplies the analog data voltage to supply a data line DL. As the analog data voltage is supplied, a scanning pulse is applied to a gate line GL to thereby charge a liquid crystal cell Clc.
A gate electrode of the TFT is connected to the gate line GL while a source electrode thereof is connected to the data line DL. Further, a drain electrode of the TFT is connected to a pixel electrode of the liquid crystal cell Clc and to one electrode of a storage capacitor Cst.
A common electrode of the liquid crystal cell Clc is supplied with a common voltage Vcom.
The storage capacitor Cst stores a data voltage fed from the data line DL when the TFT is turned on, to maintain the voltage at the liquid crystal cell Clc.
When the scanning pulse is applied to the gate line GL the TFT is turned on to provide a conductive channel between the source electrode and the drain electrode thereof to supply a voltage on the data line DL to the pixel electrode of the liquid crystal cell Clc. An electric field generated between the pixel electrode and the common electrode controls the alignment of liquid crystal molecules of the liquid crystal cell to thereby modulate an incident light.
A configuration of a related art LCD including pixels having the above-mentioned structure will be described with reference to FIG. 2.
FIG. 2 is a block diagram showing a configuration of a liquid crystal display device of the related art.
Referring to FIG. 2, a related art liquid crystal display device 100 includes a liquid crystal display panel 110 provided with a thin film transistor (TFT) for driving the liquid crystal cell Clc at a crossing of data lines DL1 to DLm and gate lines GL1 to GLn; a data driver for supplying a data to the data lines DL1 to DLm of the liquid crystal display panel 110; a gate driver 130 for supplying a scanning pulse to the gate lines GL1 to GLn of the liquid crystal display panel 110; a gamma reference voltage generator 140 for generating a gamma reference voltage to supply to the data driver 120; a backlight assembly for irradiating a light onto the liquid crystal display panel 110; an inverter 160 for applying an alternating current voltage and a current to the backlight assembly 160; a common voltage generator 170 for generating a common voltage Vcom to supply to the common electrode of the liquid crystal cell Clc of the liquid crystal display panel 110; a gate driving voltage generator 180 for generating a gate high voltage VGH and a gate low voltage VGL to supply them to the gate driver 130; and a timing controller 190 for controlling the data driver 120 and the gate driver 130.
The liquid crystal display panel 110 includes a liquid crystal layer injected or formed between two glass substrates. On the lower glass substrate of the liquid crystal display panel 110, the data lines DL1 to DLm and the gate lines GL1 to GLn perpendicularly cross each other. A TFT is provided at each crossing between the data lines DL1 to DLm and the gate lines GL1 to GLn. The TFT supplies a data on the data lines DL1 to DLm to the liquid crystal cell Clc in response to a scanning pulse. The gate electrode of the TFT is connected to the gate lines GL1 to GLn while the source electrode thereof is connected to the data line DL1 to DLm. Further, the drain electrode of the TFT is connected to the pixel electrode of the liquid crystal cell Clc and to the storage capacitor Cst.
The TFT is turned on in response to the scanning pulse applied via the gate lines GL1 to GLn, to the gate terminal thereof. Upon turning-on of the TFT, a video data on the data lines DL1 to DLm is supplied to the pixel electrode of the liquid crystal cell Clc.
The data driver 120 supplies data to the data lines DL1 to DLm in response to a data driving control signal DDC from the timing controller 190. Further, the data driver 120 samples and latches a digital video data RGB fed from the timing controller 190, and then converts it into an analog data voltage capable of expressing a gray scale level at the liquid crystal cell Clc of the liquid crystal display panel 110 on a basis of a gamma reference voltage from the gamma reference voltage generator 140 and supplies the analog data voltage the data lines DL1 to DLm.
The gate driver 130 sequentially generates a scanning pulse, that is, a gate pulse in response to a gate driving control signal GDC and a gate shift clock GSC from the timing controller 190 to supply to the gate lines GL1 to GLn. The gate driver 130 determines a high level voltage and a low level voltage of the scanning pulse in accordance with the gate high voltage VGH and the gate low voltage VGL from the gate driving voltage generator 180.
The gamma reference voltage generator 140 receives a power voltage Vcc of 0V to 3.3V supplied from an external system mounted with the liquid crystal display device 100, for example, from a controller (not shown) of an image display equipment such as a television receiver to thereby generate a positive gamma reference voltage and a negative gamma reference voltage. The gamma reference voltage generator 140 outputs the positive and negative gamma reference voltages to the data driver 120.
The backlight assembly 150 is provided at the rear side of the liquid crystal display panel 110 and is energized by an alternating current voltage supplied by the inverter 160 to irradiate a light onto each pixel of the liquid crystal display panel 110.
The inverter 160 converts a rectangular wave signal generated in the interior thereof into a triangular wave signal and then compares the triangular wave signal with a direct current power voltage Vcc supplied from the external system, thereby generating a burst dimming signal proportional to a result of the comparison. A driving integrated circuit (IC) for controlling a generation of the AC voltage and current within the inverter 160 controls a generation of AC voltage and current supplied to the backlight assembly 150 in response to the burst dimming signal.
The common voltage generator 170 receives a high-level power voltage VDD to generate a common voltage Vcom and supplies Vcom to the common electrode of the liquid crystal cell Clc provided at each pixel of the liquid crystal display panel 110.
The gate driving voltage generator 180 is supplied with a power voltage VCC of 3.3V from the external system to generate the gate high voltage VGH and the gate low voltage VGL to be supplied the data driver. The gate driving voltage generator 180 generates a gate high voltage VGH greater than a threshold voltage of the TFT provided at each pixel of the liquid crystal display panel 110 and a gate low voltage VGL less then the threshold voltage of the TFT. The generated gate high voltage VGH and the gate low voltage VGL is used for determining a high level voltage and a low level voltage respectively for the scanning pulse generated by the gate driver 130.
The timing controller 190 supplies a digital video data RGB from a digital video card (not shown) to the data driver 120 and generates a data driving control signal DCC and a gate driving control signal GDC using horizontal and vertical synchronizing signals H and V. The timing controller 190 supplies the data driving control signal and the gate driving control signal in response to a clock signal CLK to the data driver 120 and the gate driver 130, respectively. The data driving control signal DDC includes a source shift clock SSC, a source start pulse SSP, a polarity control signal POL and a source output enable signal SOE. The gate driving control signal GDC includes a gate start pulse GSP and a gate output enable signal GOE.
In the above-described liquid crystal display device of the related art, the black brightness data and the white brightness data supplied to a plurality of data lines DL1 to DLm ideally take a shape of rectangular wave in which a positive (+) polarity region and a negative (−) polarity region are symmetrically divided on the basis of the common voltage Vcom as shown in FIG. 3A. In practice however, the waveforms are distorted due to environmental circumstances and internal resistances, and the waveforms deviate from the ideal rectangular wave shape to instead have voltage drops as shown in FIG. 3B.
As shown in FIG. 3B, both the positive black brightness data and the negative black brightness data are dropped and the drop voltage ΔVp_B of the positive black brightness data has the same magnitude as a drop voltage ΔVp_B of the negative black brightness data. Furthermore, both the positive white brightness data and the negative white brightness data are dropped and a drop voltage ΔVp_W of the positive white brightness data has the same magnitude as a drop voltage ΔVp_W of the negative white brightness data.
More particularly, it can be seen from FIG. 3B that the drop voltage ΔVp_W of the positive and negative white brightness data have at least twice larger magnitude than the drop voltage ΔVp_B of the positive and negative black brightness data.
Because the common voltage Vcom is supplied at a constant value while the black brightness data and the white brightness data are dropped as described above, a charged amount (the voltage charged into a liquid crystal cell) from the positive black brightness data is decreased by the drop voltage ΔVp_B while a charged amount from the negative black brightness data is increased by the drop voltage ΔVp_B. Likewise, a charged amount from the positive white brightness data is decreased by the drop voltage ΔVp_W while a charged amount from the negative white brightness data is increased by the drop voltage ΔVp_W.
Since the charged amounts of the black brightness data and the white brightness data become non-uniform at the positive region and the negative region a flicker is generated at a picture field. More particularly since a charged amount from the positive white brightness data is considerably decreased in proportion to a magnitude of the drop data ΔVp_W while a charged amount of the negative white brightness data is considerably increased in proportion to a magnitude of the drop data ΔVp_W in the case of the white brightness data rather than the black brightness data a visible flicker occurs in the picture field.